Anti-nuisance lawsuit warning: The purpose of these notes is to remind me, Zoegond, of stuff or to help me work stuff out. They may contain mistakes.

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Monday, February 14, 2011

Circuit analysis with transistors (BJT)

(Notes on http://www.ittc.ku.edu/~jstiles/312/handouts/Steps%20for%20DC%20Analysis%20of%20BJT%20Circuits.pdf)

1. Assume operating mode (Active, Saturated, Cutoff)

2. Enforce appropriate equalities:
A - Vbe = 0.7, Ic = beta * Ib
S - Vbe = 0.7, Vcb = -0.5 (so Vce = 0.2)
C - Ib = Ic = Ie = 0

Also Vce = Vcb + Vbe in all modes

3. Analyse
A - Ic = beta * Ib, Ie = Ic + Ib, Vce = Vcb + 0.7. Find one i and one of Vce, Vcb
S - Find two of Ic, Ib, Ie using the three voltages (which are all known)
C - Find two of Vbe, Vce, Vcb

4. Check inequalities
A - Vcb > 0 or Vce > 0.7; Ib > 0 (or Ic or Ie > 0)
S - Ic < beta * Ib; Ib and Ic and Ie all > 0
C - Vbe < 0, Vcb > 0

5. If any of the inequalities are not present, the assumption was wrong. Start again with a different one.

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